MeitY invites MSMEs, startups, others under this govt programme to make India semiconductor hub

Technology for MSMEs: Proposals were invited in three categories – first, design and development of Systems, SoCs, ASICs, Reusable IP Cores; second, development of the application-oriented working prototype of IPs, ASICs, SoCs; and third, Proof-of-Concept oriented research and development of ASICs and FPGAs.

The government had last year announced the C2S programme. (Image: pixabay)

Technology for MSMEs: A month after approving the Rs 76,000-crore production linked incentive (PLI) scheme for the development of semiconductor and display manufacturing ecosystem in India, the government has invited applications from micro, small and medium enterprises (MSMEs), startups, academia, research and development (R&D) organisations under the Chips to Startup (C2S) programme. Ministry of Electronics and Information (MeitY) on Sunday sought 100 online applications open till January 31, 2022.

“MSMEs and startups can also participate in the programme by submitting their proposals under Academia-Industry Collaborative Project, Grand Challenge/Hackathons/Request For Proposal (RFP) for development of system/System on Chip (SoC) — essentially an integrated circuit (IC)/Intellectual Property (IP) Cores,” the ministry said in a statement. IP Core is a reusable unit of cell or integrated circuit layout design that could be licensed to multiple vendors. 

The government had last year announced the C2S programme targetting to train 85,000 engineers in the area of Very Large-Scale Integration (VLSI) and Embedded System Design along with the development of 175 Application-Specific Integrated Circuits (ASICs) and working prototypes of 20 SoCs and IP Core repository over a period of five years.  

“This will be a step towards leapfrogging in the Electronics System Design & Manufacturing (ESDM) space by way of inculcating the culture of SoC/System Level Design at bachelors, masters and research level, and act as a catalyst for the growth of startups involved in the fabless design,” the ministry added. 

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Based on the applicant’s expertise, Technology Readiness Level (TRL), and design experience acquired during earlier Special Manpower Development Programmes (SMDP) Programmes, the government invited proposals in three categories – first, design and development of Systems, SoCs, ASICs, Reusable IP Cores; second, development of the application-oriented working prototype of IPs, ASICs, SoCs; and third, Proof-of-Concept oriented research and development of ASICs and Field Programmable Gate Arrays (FPGAs). FPGAs are integrated circuits that can be programmed for specific use after its manufacturing. 

The PLI scheme announced included fiscal support up to 50 per cent of the cost of setting up semiconductor fabs (fabrication or manufacturing plants) and display fabs in India to eligible businesses. The scheme also noted another 30 per cent fiscal support of capital expenditure to approve units setting up of compound semiconductors, silicon photonics, sensors, fabs and semiconductor assembly, testing, marking, and packaging (ATMP), and outsourced semiconductor assembly and test (OSAT) facilities in India. Moreover, PLI up to 50 per cent of eligible expenditure and product deployment-linked incentive of 6 per cent – 4 per cent on net sales for five years under the Design Linked Incentive (DLI) scheme was also part of the scheme. 

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