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IITs, NITs may be roped in for chip-making

In order to make that happen, the government has widened the infrastructure by allowing students to remotely access high-tech tools for chip-making. Earlier, to access chip-making tools, students of the selected institutes, had to go to college lab, which limited the availability due to pandemic. But now, a central design facility has been enabled for remote access.

It is part of MeitY’s special manpower development programme for chips to system design (SMDP-C2SD), wherein a centralised design facility at C-DAC has been enabled for remote access by students.
It is part of MeitY’s special manpower development programme for chips to system design (SMDP-C2SD), wherein a centralised design facility at C-DAC has been enabled for remote access by students.

The ministry of electronics and IT (MeitY) is aiming that atleast 175 semiconductor chips should be designed and fabricated by students at premier institutes like IITs in the coming five years.

In order to make that happen, the government has widened the infrastructure by allowing students to remotely access high-tech tools for chip-making. Earlier, to access chip-making tools, students of the selected institutes, had to go to college lab, which limited the availability due to pandemic. But now, a central design facility has been enabled for remote access.

As per a MeitY official, in the last three years, students have designed and fabricated 150 chips, of which 110 chips were fabricated at SCL (Semi-Conductor Laboratory) Chandigarh and 40 at global makers like TSMC, UMC and Global Foundries. But in the coming five years, the government is planning that more chips should be fabricated at global firms because students would be encouraged to work on high-tech chipsets.

“With the access to the tools, chips up to 7 nm can be designed and fabricated,” said the official. The Meity has partnered with 120 premier institutes across the country including IITs, NITs, etc, for the chip-making initiative. It is part of MeitY’s special manpower development programme for chips to system design (SMDP-C2SD), wherein a centralised design facility at C-DAC has been enabled for remote access by students.

For making available the chip design infrastructure, leading industry vendors from EDA (electronic design automation), electronic computer-aided design (ECAD), IP core and design solutions industry are being partnered with. Specific collaborative arrangements are being made available with Synopsys, Cadence Design Systems, Siemens EDA, Silvaco and other leading tool vendors, IP and design solution providers and fab aggregators.

While the government wants to promote semiconductor manufacturing in India, it also wants to strengthen the design capabilities of Indian engineers. During the three-day SemiconIndia 2022 conference, which concluded last week, most of the global semiconductor leaders (like Intel, Micron, Qualcomm, LAM Research, etc) had highlighted the contribution of their Indian R&D centres.

Ashwini Vaishnaw, electronics & information technology minister, envisions making available a design talent pool of highly skilled engineers for turning India into a semiconductor hub through the chips to startup (C2S) programme and other initiatives in semiconductor policy.

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