The Design and Verification Conference and Exhibition India (DVCon India), sponsored by Accellera Systems Initiative, concluded on September 10th and 11th with record numbers in attendance and a busy exhibit floor after a successful launch last year.
Overall attendance, including exhibit-only and technical conference attendees, was nearly 600. The conference attracted exhibitors supporting the semiconductor ecosystem along with start-ups from India exhibiting for the first time.
The Award for Best Paper Presentation in the ESL track, as voted by conference attendees, went to Achutha Kirankumar V M, Bindumadhava S, Aarti Gupta and Disha Puri from Intel, for their presentation titled, “Leveraging ESL Approach to Formally Verify Algorithmic Implementations.” The Best Paper Presentation in the DV track went to Sailaja Akkem, Microsemi for the paper titled, “UVM RAL: Registers on demand – Elimination of the Unnecessary.” In the poster category Raghavendra Jn, Harathi Gudidevuni and Nikhil Gupta, Qualcomm won the award for the poster titled “Dynamic Power Automation UVM Framework.”
“DVCon India has become a must-attend conference for the design and verification community, for sharing knowledge, networking, technical discussions and learning opportunities. DVCon India rightly promotes the 4 Cs: connect, contribute, collaborate and celebrate,” stated Gaurav Jalan, DVCon India General Chair. “From the exhibit floor to the panels, tutorials, papers and poster sessions, there are plenty of opportunities for practicing engineers to learn about new products and share ideas.
“The technical program and networking opportunities this year were remarkable,” commented Prasanna Kesavan, DVCon India Program Chair. “Attendees have come to expect a high quality selection of papers and posters plus better networking, and we were able to deliver just that. We consistently receive more submissions than we can accept, so we pick the best of the best for our attendees.”
Highlights of the Week:
The two-day event was inaugurated with a lamp-lighting ceremony and welcome remarks by Gaurav Jalan, General Chair of DVCon India 2015 and opened on day 2 by Ajeetha Kumari, Vice Chair of DVCon India 2015.
Mr. Harry Foster, Chief Scientist, Design Verification Technology Division, Mentor Graphics and Mr. Vinay Shenoy, Managing Director of Infineon Technologies India delivered insightful keynotes on September 10th to a packed room of more than 550 attendees. Their speeches outlined the rising complexity throughout the entire design ecosystem and the Make in India Initiative. The rest of the day continued with tutorials and panels from different companies.
Mr. Manoj Gandhi, VP & GM of the Verification Group, Synopsys and Mr. Atul Bhatia, Mentor and Angel Investor delivered inspirational keynotes on September 11th describing the next generation of verification innovation and the Make in India Initiative of opportunities available in semiconductor design systems. The rest of the day continued with sessions containing papers and posters from a wide range of companies.
The DVCon India Steering Committee values all feedback regarding the conference. Attendees have been given a survey and are requested to provide input on how to make DVCon India 2016 even better.
Save the dates: DVCon India 2016 will be held September 15 – September 16, 2016 in Bangalore, Karnataka. DVCon Europe 2015 will be held November 11-12 at the Holiday Inn Munich City Centre, Germany and DVCon US 2016 will be held February 29 – March 3, 2016 at the DoubleTree Hotel, San Jose, California USA.
DVCon is the premier conference for discussion of the functional design and verification of electronic systems. DVCon is sponsored by Accellera Systems Initiative, an industry consortium dedicated to the development and standardization of design and verification languages. For more information about Accellera, please visit www.accellera.org. For more information about DVCon India, please visit www.dvcon-india.org. Follow @dvcon on Twitter or to comment, please use #dvcon.